The present invention relates to a gate circuit, a semiconductor integrated circuit device, a method of fabrication thereof, a semiconductor memory and a microprocessor, or more in particular to a BiCMOS gate circuit, a semiconductor integrated circuit device and a method of fabrication thereof, a semiconductor memory and a microprocessor suitable for operation with low voltage supply (low voltage source) and low consumption power.
The present invention also relates to a semiconductor integrated circuit device including at least a bipolar transistor having a high-concentration buried layer and a method of fabrication thereof.
A prior art system comprising at least a bipolar transistor combined with a MOS transistor is disclosed in IEEE Journal of Solid-State Circuits, Vol. 26, 1991, pp. 150 to 153.
Also, the prior art systems relating to a semiconductor integrated circuit include JP-A-54-67384 and U.S. Pat. No. 4,862,240.
A prior art system relating to a semiconductor integrated circuit device having at least a bipolar transistor is disclosed, for example, in "Nikkei Micro Device", February 1990, pp. 53 to 54, published by Nikkei McGRAW-HILL. According to this system, an integrated circuit device having a bipolar transistor generally comprises an NPN transistor, for example, in which N.sup.+ ions constituting the collector thereof are partially buried in the substrate, and P.sup.+ ions are buried in such an arrangement as to surround the N.sup.+ ions to isolate them electrically from other devices.